📈 Huawei Unveils Tau (τ) Scaling Law to Redefine Semiconductor Future

At the 2026 IEEE International Symposium on Circuits and Systems (ISCAS), Huawei Executive He Tingbo introduced the Tau (τ) Scaling Law as a new guiding principle for semiconductors, shifting the industry focus from traditional geometric shrinking to time-based signal propagation optimization. • Core Principle: As Moore's Law faces physical and economic constraints, the Tau Law seeks to continuously compress signal propagation delay and improve transistor density across devices, circuits, chips, and systems. • Key Technology: The framework leverages LogicFolding architecture to break 2D layout boundaries, shortening critical-path wiring to reduce resistive and capacitive loads. It also utilizes UnifiedBus at the system level to minimize communication latency. • Track Record & Timeline: • Huawei has already designed and mass-produced 381 chips over the past six years based on this principle. • The upcoming Kirin chips scheduled for Fall 2026 will be the first commercial processors to adopt the LogicFolding architecture. • Future Outlook: By 2031, Huawei targets high-end chip designs with a transistor density equivalent to 14 Å (1.4 nm) processes. _Note: This framework focuses on density equivalence through architectural stacking and system-level optimization rather than traditional lithographic transistor shrinking._